Semiconductor devices which provide power converter functionality, for example for altering DC power using a DC to DC (DC-DC) converter, are used in various capacities. For example, input DC power from one or more batteries can be converted to provide one or more power outputs at voltages which can be higher or lower than the input DC voltage. Performing a power conversion function using integrated circuits (IC's) typically requires a DC high-side transistor electrically coupled with voltage in (VIN), a DC low-side transistor electrically coupled with ground, and a control circuit. In a synchronous step-down device (i.e. a “synch buck” converter), for example, power conversion is performed to decrease voltage by alternately enabling the high-side device and the low-side device, with a switching and control function being performed by the controller circuit with high efficiency and low power loss through the device.
Power converter circuits which can operate at a high power density (for example, high voltage and high current) are needed, particularly devices which can efficiently convert high density power at a reasonable cost. One challenge with high power density is that the size of the output circuitry increases as the voltage and current rating of the converter increases. Different implementations of the controller circuit, the high-side device, and the low-side device have been used, each with its own advantages and disadvantages.
As depicted in FIG. 1, co-packaged devices 10 can include control circuitry on one semiconductor die 12 to provide a controller IC, the high-side device on a second die 14, and the low-side device on a third die 16. A circuit schematic of the FIG. 1 device is depicted in FIG. 2, which also depicts controller circuitry 12, high-side MOSFET 14 electrically coupled with VIN, and low-side MOSFET 16 electrically coupled with device power ground (PGND). The devices can have standard package pinouts and pin assignments such as those depicted. Forming controller, low-side, and high-side devices on separate dies can have problems with interconnection parasitics on the controller IC which can negatively influence device performance. This may result from parasitic inductance inherent in bond wires, electromagnetic interference (EMI), ringing, efficiency loss, etc. Higher-quality connections such as copper plate (or clip) bonding, or ribbon bonding, can be used to reduce parasitics, but this increases assembly costs. Further, co-packaging standard vertical MOSFETs can result in a circuit with parasitic inductance in series with the output node. Problems caused by parasitic inductances are well established in the art. While a capacitor can be connected to the output terminals such as the input (VIN) and ground, to compensate for the negative impact of inductances connected to these nodes, capacitances cannot be connected to internal nodes such as the Output (VOUT, also referred to as phase node or switched node).
Additionally, packages containing three separate dies have higher production costs, for example because of the large number of die attach steps (three dies in this example), and additional space is required for spacing between adjacent dies to allow for die attach fillets, die placement tolerance, and die rotation tolerance, which reduces the power-density which can be achieved. To reduce electrical interference between adjacent dies, each die is placed on a separate die pad.
Examples of co-packaged devices include non-synch buck with co-packaged high-side MOSFET and external Schottky diode, non-synch buck with co-packaged high-side and low-side MOSFETs, synchronous buck with co-packaged high-side and low-side MOSFETs, boost converter with co-packaged MOSFET, and boost converter with co-packaged MOSFET and Schottky diodes.
Discrete devices can also be mounted separately to a printed circuit board. In this solution, a first packaged die containing controller circuitry is used in conjunction with a second packaged die containing a high-side MOSFET and a third package containing a low-side MOSFET. The three packages are mounted on a printed circuit board. However, this can increase packaging costs as the number of dies and separate packages which must be manufactured and handled is at least tripled, and the area used on the printed circuit board is also increased, leading to increased circuit board size.
There is a need for power converters in which device processing costs and device footprint are reduced while providing a power converter device which has sufficient device electrical characteristics with low parasitic inductance and capacitance.
It should be noted that some details of the FIGS. have been simplified and are drawn to facilitate understanding of the inventive embodiments rather than to maintain strict structural accuracy, detail, and scale.